CIOReview | | 9 NOVEMBER 2022between the wafer being etched and the showerhead above it, created iterations on reactant distribution by varying the hole patter in the showerhead, created iterations on ion-dependent etch reactions by varying the RF power characteristics (RF frequency, RF peak-to-peak voltage) delivered to the plasma reactor, etc.Experiments were almost always one-factor-at-a-time experiments, because multifactor experiments, for example experiments where RF power and process pressure and reactant mixtures were all deliberately varied according to Design of Experiment principles, produced tangles of data which were difficult to separate into main effects, interactions, and confounding. Or which were difficult to separate because, as the SAS Institute reports, "Generating and analyzing these designs relied primarily on hand calculation in the past; until recently practitioners started using computer-generated designs for a more effective and efficient DOE."How did we get here? Cheap silicon, and abundant transistors - lots of them, to solve the compute-intense / compute-expense design and modeling bottlenecks that once prevented all but those fortunate to have access to University-level or National Laboratory-level computer centers from doing anything except imagining how we would do the work.It's now routine for engineers and designers, for example my colleagues at Ichor Systems, Inc., working in the realm of Computational Fluid Dynamics on both continuous improvement projects and on innovative configuration projects for our semiconductor processing gas delivery and chemical delivery products, to employ a host of modeling and design tools in the course of their work well before we cut metal or mold plastic. For DOE and data visualization, the JMP product does on a desktop or laptop computer what we once did (or tried to do) by hand. For modeling plasma etch reactors and processes, or deposition reactors and processes, the tools from COMSOL, and from Ansys, and from others, support our efforts. As does SolidWorks for 3D CAD.What do we imagine comes next? AI-backed machines, looking over our shoulders as assistants, or being let loose to toil away on thorny problems without too much supervision, will step into many roles, perhaps, in semiconductor capital equipment engineering and process development. But as I wrote elsewhere, together with colleagues from a SEMI ASMC Smart Manufacturing panel a few years ago, "There's nothing artificial about pairing human intelligence with machine-based smart manufacturing. Implementing an ever-smarter tomorrow in semiconductor manufacturing requires smart people just as much as it requires smart machines."We can't advance without both. In a fortuitous and virtuous cycle, advances in transistor architectures and advances in our ability to build those architectures at scale have been one long continuous improvement arc, an arc spanning the course of at least four decades
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